DSC2011FE2-F0016 crystal-less? configurable clock generator general description the DSC2011FE2-F0016 is a programmable, high performance dual lvcmos output oscillator utilizing micrel's proven silicon mems technology to provide excellent jitter and stability while incorporating additional device functionality. two lvcmos outputs are controlled by separate supply voltages to allow for independent voltage level control. the frequencies of the outrputs can be identical or independently derived from a common pll frequency source. the DSC2011FE2-F0016 has provision for up to eight user-defined pre-programmed, pin-selectable output frequency combinations. the DSC2011FE2-F0016 is also equipped with independent pin-selectable output drive strengths to reduce emi and noise. applications consumer electronics storage area networks - sata, sas, fibre channel passive optical networks - epon, 10g-epon, gpon, 10g-gpon ethernet - 1g, 10gbase-t/kr/lr/sr, and fcoe hd/sd/sdi video & surveillance pci express automotive features frequency and output formats: - lvcmos 25/25mhz - lvcmos 50/50mhz low rms phase jitter: <1ps (typ) 25ppm frequency stability -20c to +70c ext. commercial temperature range high supply noise rejection: -50dbc pin-selectable configurations - 2-bit output drive strength - up to 8 output frequency combinations excellent shock & vibration immunity - qualified to mil-std-883 high reliability - 20x better mtf than quartz oscillators supply range of 2.25 to 3.6v aec-q100 automotive qualified 14-pin 3.2mm x 2.5mm qfn package block diagram vss vdd/vdd2 control circuitry mems pll 2 m1 m2 2 clk1 25mhz lvcmos clk2 50mhz lvcmos o1s0/o1s1 o2s0/o2s1 oe fs0/fs1/fs2 micrel inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com april 12, 2015 revision 1.0 tcghelp@micrel.com or (408) 955-1690 2898
micrel, inc. DSC2011FE2-F0016 ordering information ordering part number industrial temperature range shipping package DSC2011FE2-F0016 -20c to +70c tube 14-pin 3.2mm x 2.5mm qfn DSC2011FE2-F0016t -20c to +70c tape and reel 14-pin 3.2mm x 2.5mm qfn devices are green and rohs compliant. sample material may have only a partial top mark. pin configuration 14-pin 3.2mm x 2.5mm qfn oe nc o2s0 gnd clk2 o1s1 o1s0 clk1 fs0 fs1 fs2 vdd2 vdd o2s1 pin description pin number pin name pin type pin function 1 oe i enables outputs when high and disables outputs when low 2 nc leave unconnected or connect to ground 3 o2s0 i least significant bit for drive strength selection for clk2, see table 1 for details 4 gnd pwr ground 5 fs0 i least significant bit for frequency selection, see table 2 for details 6 fs1 i middle bit for frequency selection, see table 2 for details 7 fs2 i most significant bit for frequency selection, see table 2 for details 8 clk1 o lvcmos output 9 o1s0 i least significant bit for drive strength selection for clk1, see table 1 for details 10 o1s1 i most significant bit for drive strength selection for clk1, see table 1 for details 11 clk2 o lvcmos output 12 vdd2 pwr power supply for lvcmos output clk2, 1.65v to 3.3v (vdd2<=vdd) 13 vdd pwr power supply 14 o2s1 i most significant bit for drive strength selection for clk2, see table 1 for details april 12, 2015 2 revision 1.0 tcghelp@micrel.com or (408) 955-1690 2898
micrel, inc. DSC2011FE2-F0016 operational description the DSC2011FE2-F0016 is a dual output lvcmos oscillator consisting of a mems resonator and a supporting pll ic. the two lvcmos outputs are generated through independent 8-bit programmable dividers from the output of the internal pll. the two constraints are imposed on the output frequencies: 1) f2 = m x f1/n, where m and n are even integers between 4 and 254, 2) 1.2ghz < n x f2 < 1.7ghz. the actual frequencies output by DSC2011FE2-F0016 are controlled by an internal pre-programmed memory (otp). this memory stores all coefficients required by the pll for up to eight different frequency combinations. three control pins (fs0 - fs2) select the output frequency combination. DSC2011FE2-F0016 has independent control of the output voltage levels of the two outputs. the high voltage level of clk1 is equal to the main supply voltage, vdd (pin 13). vdd2 (pin 12) sets the high voltage level of clk2. vdd2 must be equal to or less than vdd at all times to insure proper operation. vdd2 can be as low as 1.65v. when oe (pin 1) is floated or connected to vdd, the DSC2011FE2-F0016 is in operational mode. driving enable to ground will tri-state both output drivers (hi-impedance mode). DSC2011FE2-F0016 has programmable output drive strength for each output. using two control pins (oxs0- oxs1) for each output, the drive strength can be indepen- dently adjusted to match circuit board impedances to reduce spower supply noise, overshoot/undershoot and emi. table 1 displays typical rise / fall times for the output with a 15pf load capacitance as a function of these control pins at vdd = 3.3v and room temperature. output drive strength bits [oxs1, oxs0] - default is [11] 00 01 10 11 tr (ns) 1.6 1.4 1.2 1.1 tf (ns) 2.4 2.2 1.5 1.4 table 1. rise/fall times for drive strengths output clock frequencies frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the associated frequency highlighted in bold. freq (mhz) freq select bits [fs2, fs1, fs0] - default is [111] 000 001 010 011 100 101 110 111 clk1 25 na na na na na na 25 clk2 50 na na na na na na 50 table 2. pin-selectable output frequencies absolute maximum ratings item min. max. units condition supply voltage -0.3 +4.0 v input voltage -0.3 vdd + 0.3 v junction temp - +150 c storage temp -55 +150 c soldering temp - +260 c 40sec max. esd hbm mm cdm - 4000 400 1500 v 1000+ years of data retention on internal memory april 12, 2015 3 revision 1.0 tcghelp@micrel.com or (408) 955-1690 2898
micrel, inc. DSC2011FE2-F0016 (unless specified otherwise: t = 25c, max lvcmos drive strength) specifications 4 4 5 parameter symbol condition min. typ. max. units supply voltage1 vdd 2.25 3.6 v supply current idd oe pin low - outputs are disabled 21 23 ma supply current2 idd oe pin high - outputs are enabled cl = 15pf, f01 = f02 = 125mhz 32 ma frequency stability f includes frequency variation due to initial tolerance, temp. and power supply voltage 25 ppm aging f first year (@ 25c) 5 ppm startup time3 tsu t = 25c 5 ms input logic levels input logic high input logic low vih vil 0.75 x vdd - - 0.25 x vdd v output disable time tda 5 ns output enable time ten 20 ns pull-up resistor2 pull-up exists on all digital io 40 kohms lvcmos outputs output logic levels output logic high output logic low voh vol i = 6ma 0.9 x vdd - - 0.1 x vdd v output transition time rise time fall time tr tf 20% to 80% cl = 15pf 1.1 1.4 2 2 ns frequency clk1 clk2 [fs2, fs1, fs0] = [1, 1, 1] 25 50 mhz output duty cycle sym 45 55 % period jitter jper f01 = f02 = 125mhz 3 psrms integrated phase noise jph 200khz to 20mhz @ 125mhz 100khz to 20mhz @ 125mhz 12khz to 20mhz @ 125mhz 0.3 0.38 1.7 2 psrms notes: 1. pin 12 vdd2, and pin 13 vdd should be filtered with 0.1uf capacitors. 2. output is enabled if oe pin is floated or not connected. 3. tsu is time to 100ppm stable output frequency after vdd is applied and outputs are enabled. 4. output waveform and test circuit figures below define the parameters. 5. period jitter includes crosstalk from adjacent output. april 12, 2015 4 revision 1.0 tcghelp@micrel.com or (408) 955-1690 2898
micrel, inc. DSC2011FE2-F0016 nominal performance parameters (unless specified otherwise: t = 25c, vdd = 3.3v) figure 1. lvcmos phase jitter (integrated phase noise) lvcmos output waveform figure 2. lvcmos output waveform output oe msl 1 @ 260c refer to jstd-020c ramp-up rate (200c to peak temp) 3c/sec max. preheat time 150c to 200c 60 - 180 sec time maintained above 217c 60 - 150 sec peak temperature 255 - 260c time within 5c of actual peak 20 - 40 sec ramp-down rate 6c/sec max. time 25c to peak temperature 8 min max. april 12, 2015 5 revision 1.0 tcghelp@micrel.com or (408) 955-1690 2898
micrel, inc. DSC2011FE2-F0016 solder reflow profile figure 3. solder reflow profile package information 7 3.2mm x 2.5mm 14 lead plastic package notes: 6. connect the exposed die paddle to ground. 7. package information is correct as of the publication date. for updates and most current information, go to www.micrel.com. micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for its use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in micrel's terms and conditions of sale for such products, micrel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. a purchaser's use or sale of micrel products for use in life support appliances, devices or systems is a purchaser's own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2015 micrel, incorporated. april 12, 2015 6 revision 1.0 tcghelp@micrel.com or (408) 955-1690 2898
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